ARM_SYNC_ICACHE(2) (arm)

ARM_SYNC_ICACHE(2) | System Calls Manual (arm) | ARM_SYNC_ICACHE(2)

# NAME

`arm_sync_icache` —
clean the CPU data cache and flush the CPU instruction cache

# LIBRARY

ARM Architecture Library (libarm, -larm)

# SYNOPSIS

`#include <machine/sysarch.h>`

int
`arm_sync_icache`(uintptr_t addr, size_t len);

# DESCRIPTION

`arm_sync_icache`() will make sure that all the entries in the processor instruction cache are synchronized with main memory and that any data in a write back cache has been cleaned. Some ARM processors (e.g. SA110) have separate instruction and data caches thus any dynamically generated or modified code needs to be written back from any data caches to main memory and the instruction cache needs to be synchronized with main memory.

On such processors `arm_sync_icache`() will clean the data cache and invalidate the processor instruction cache to force reloading from main memory. On processors that have a shared instruction and data cache and have a write through cache (e.g. ARM6) no action needs to be taken.

The routine takes a start address addr and a length len to describe the area of memory that needs to be cleaned and synchronized.

# ERRORS

`arm_sync_icache`() will never fail so will always return 0.

# REFERENCES

StrongARM Data Sheet

January 17, 2014 | NetBSD 9.5